[QE-developers] SX-Aurora TSUBASA

[Ye Luo]

Relying on compiler to move page between host and device via the PCI-E bus
scares me and I'm more comfortable with an offload model which allows me to
control data movement.
NEC recently upstreams an Aurora plugin into the OpenMP offload runtime
library in LLVM.
Once the LLVM IR to NEC instruction backend is fully working (Maybe already
working). We should be able to use OpenMP offload and Flang (not yet in
production) which is now in LLVM.
Ye
===================
Ye Luo, Ph.D.
Computational Science Division & Leadership Computing Facility
Argonne National Laboratory


On Thu, May 28, 2020 at 2:34 PM Tobias Klöffel <tobias.kloeffel at fau.de>
wrote:

> Dear all,
>
> just to share my limited experience with TSUBASA (please correct me if its
> wrong):
>
> You can use it with any standard C/C++/Fortran MPI/OpenMP code, the code
> runs completely on the card. There is some work for back loading onto the
> host CPU and also some work on using the card in a offload fashion, but I
> have no clue about the status of these projects. If I remember correctly
> those projects are C/C++ LLVM only.
> Vectorizable code naturally performs exceptionally good, however,
> unvectorizable code is only performed via an ARM core and you will for sure
> find some routines that are extremely slow and more or less irrelevant on
> standard CPUs.
>
> NEC provides BLAS/FFTW/Lapack/SCALapack, compiling CPMD was possible out
> of the box. My biggest issue was indeed the support of OpenMP
> parallelization in those libraries as well as support for nested OpenMP in
> general.
>
> However, I am looking forward to see the code changes done by NEC, and of
> course, the performance.
>
> Best,
> Tobias
>
> On 5/28/20 3:21 PM, IWATA NAOKI(岩田 直樹) wrote:
>
> Dear Ye and Paolo,
>
>
>
> Thank you very much for your quick response and your interest in SX-Aurora
> TSUBASA.
>
> I will answer your questions and will provide the code to you later.
>
>
>
> At  this moment, please look at the following site:
>
> https://www.hpc.nec/index.en
>
>
>
>
>
> Best Regards,
>
>
>
> Naoki Iwata.
>
>
>
>
>
> *From:* Ye Luo <xw111luoye at gmail.com> <xw111luoye at gmail.com>
> *Sent:* Thursday, May 28, 2020 1:09 AM
> *To:* General discussion list for Quantum ESPRESSO developers
> <developers at lists.quantum-espresso.org>
> <developers at lists.quantum-espresso.org>
> *Cc:* IWATA NAOKI(岩田 直樹) <n-iwata-da at nec.com> <n-iwata-da at nec.com>
> *Subject:* ##freemail## Re: [QE-developers] SX-Aurora TSUBASA
>
>
>
> Hi Naoki,
>
> Could you put the code on gitlab or github for us to preview?
>
> Could you say a bit more how did you "port"? Which part of QE was ported?
> How did you port?
>
> NEC aurora is an accelerator but it is not a GPU. How did you program it?
>
> I was aware of FFT libraries for SX-Aurora. Did you use SX-Aurora via
> library?
>
>
>
> The code path to SX in FFTXLIB is not maintained for a long time I guess.
> Perhaps it is time to clean/refactor that part.
>
>
>
> Regarding compiler options, do you have a customized compiler? Or it is
> gfortran or flang and you just need to just pass some -D flags?
>
>
>
> Best,
>
> Ye
>
> ===================
> Ye Luo, Ph.D.
> Computational Science Division & Leadership Computing Facility
> Argonne National Laboratory
>
>
>
>
>
> On Wed, May 27, 2020 at 10:15 AM IWATA NAOKI(岩田 直樹) <n-iwata-da at nec.com>
> wrote:
>
> Dear developers,
>
> My name Naoki Iwata from NEC Corporation in Japan.
> We are developing and selling a newer vector-supercomputer, SX-Aurora
> TSUBASA.
> https://www.nec.com/en/global/solutions/hpc/
>
> We have ported and optimized QUANTAM ESPRESSO v6.3 for SX-Aurora TSUBASA.
> So we would like to ask you to implement our compile options and source
> code changes
> for the optimization for SX-Aurora TSUBASA into the original QUANTUM
> ESPRESSO
> makefile and source code.
> I looked at the users' guide, I found the description of SX-6 and SX-8.
> They are old system.
> So we also would like to update it to SX-Aurora TSUBASA.
> What should we do for that?
>
> Best Regards,
>
> Naoki Iwata
> -----
> Naoki Iwata (n-iwata-da at nec.com)
> NEC AI Platform Division
>
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>
> --
> M.Sc. Tobias Klöffel
> =======================================================
> HPC (High Performance Computing) group
> Erlangen Regional Computing Center(RRZE)
> Friedrich-Alexander-Universität Erlangen-Nürnberg
> Martensstr. 1
> 91058 Erlangen
>
> Room: 1.133
> Phone: +49 (0) 9131 / 85 - 20101
>
> =======================================================
>
> E-mail: tobias.kloeffel at fau.de
>
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