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<p style="margin-bottom: 0cm;" align="JUSTIFY"><font face="Arial, sans-serif"><font size="2"><b>Nanoscale
Device Modeling Research Positions</b></font></font></p><p style="margin-bottom: 0cm;" align="JUSTIFY"><font face="Arial, sans-serif"><font size="2"><b>IBM
India Semiconductor Research and </b></font></font>
</p>
<p style="margin-bottom: 0cm;" align="JUSTIFY"><font face="Arial, sans-serif"><font size="2"><b>Development
Center, Bangalore, India.</b></font></font></p>
<p style="margin-bottom: 0cm;" align="JUSTIFY"><br>
</p>
<p style="margin-bottom: 0cm;" align="JUSTIFY"><font face="Arial, sans-serif"><font size="2">The
IBM India Semiconductor Research and Development Center invites
applications from outstanding scientists/engineers for multiple
positions in the area of nano science and technology at IBM,
Bangalore, India. The candidates are expected to contribute to the
design, theory, and modeling of next generation semiconductor
nanodevices. The research and development work involves atomistic
modeling and Technology-CAD of nano devices. </font></font>
</p>
<p style="margin-bottom: 0cm;" align="JUSTIFY"><br>
</p>
<p style="margin-bottom: 0cm;" align="JUSTIFY"><font face="Arial, sans-serif"><font size="2"><b>Atomistic/Quantum
Effects in Nanodevices :</b></font></font></p>
<p style="margin-bottom: 0cm;" align="JUSTIFY"><br>
</p>
<p style="margin-bottom: 0cm;" align="JUSTIFY"><font face="Arial, sans-serif"><font size="2">This
work involves theoretical understanding of quantum effects in 22 nm
scale devices; these include carrier transport, geometry and material
dependent bandstructure calculations, role of metal and high-k
material interfaces, role of high-k on bandstructure and related
phenomena to enable development of 22 nm scale devices. </font></font>
</p>
<p style="margin-bottom: 0cm;" align="JUSTIFY"><br>
</p>
<p style="margin-bottom: 0cm;" align="JUSTIFY"><font face="Arial, sans-serif"><font size="2">Candidates
to be considered for this area are required to have a strong
understanding of semiconductor physics and quantum effects in
nanodevices. The candidates are also expected to have a strong
background in devices physics, electronic structure methods,
numerical programming, hands on experience with ab-initio modeling
tools, and computer programming in mixed language environment.</font></font></p>
<p style="margin-bottom: 0cm;" align="JUSTIFY"><br>
</p>
<p style="margin-bottom: 0cm;" align="JUSTIFY"><font face="Arial, sans-serif"><font size="2"><b>Technology
– CAD : </b></font></font>
</p>
<p style="margin-bottom: 0cm;" align="JUSTIFY"><br>
</p>
<p style="margin-bottom: 0cm;" align="JUSTIFY"><font face="Arial, sans-serif"><font size="2">This
work involves the improvement and development of an IBM proprietary
tool for the simulation of leading edge semiconductor devices. In
particular, physical and numerical models for carrier transport
influenced by </font></font><font face="Arial, sans-serif"><font size="2"><i>e.g.</i></font></font><font face="Arial, sans-serif"><font size="2">,
channel materials, strain, high-k materials, and crystallographic
orientation on device performance will be developed and implemented.</font></font></p>
<p style="margin-bottom: 0cm;" align="JUSTIFY"><br>
</p>
<p style="margin-bottom: 0cm;" align="JUSTIFY"><font color="#000000"><font face="Arial, sans-serif"><font size="2">A
comprehensive knowledge of modern device physics is essential to this
position, including both FET and BJT device operation, as well as
bulk and SOI device structures. Also, a good background and
understanding of quantum phenomenon relevant to semiconductor
nanodevices is essential. </font></font></font>
</p>
<p style="margin-bottom: 0cm;" align="JUSTIFY"><br>
</p>
<p style="margin-bottom: 0cm;" align="JUSTIFY"><font color="#000000"><font face="Arial, sans-serif"><font size="2"><b>Computer/Software
Skills</b></font></font></font><font color="#000000"><font face="Arial, sans-serif"><font size="2">
– Demonstrated proficiency with C++, C, and Tcl are required, and
experience with team-based large scale software design is desired.
Familiarity with concepts related to numerical solution of PDEs, and
the ability to realize robust numerical implementations of
semiconductor-related physical models in discretized form, are highly
desired. Experience with scientific computation on massively parallel
computer architectures is a plus. Familiarity with the Linux and/or
AIX operating systems, as well as the AFS file system, would be an
added plus.</font></font></font></p>
<p style="margin-bottom: 0cm;" align="JUSTIFY"><br>
</p>
<p style="margin-bottom: 0cm;" align="JUSTIFY"><font face="Arial, sans-serif"><font size="2"><b>Qualifications
:</b></font></font></p>
<p style="margin-bottom: 0cm;" align="JUSTIFY"><br>
</p>
<p style="margin-bottom: 0cm;" align="JUSTIFY"><font face="Arial, sans-serif"><font size="2">Interested
applicants for the above regular research positions should have a
Ph.D/MS in Physics, Electrical Engineering, Applied Physics, Computer
Science, or Theoretical Materials Science. Please send your resume
to,</font></font></p>
<p style="margin-bottom: 0cm;" align="JUSTIFY"><font face="Arial, sans-serif"><font size="2"><a href="mailto:kotamurali@in.ibm.com">kotamurali@in.ibm.com</a></font></font></p>
<p style="margin-bottom: 0cm;" align="JUSTIFY"><br>
</p>
<p style="margin-bottom: 0cm;" align="JUSTIFY"><font face="Arial, sans-serif"><font size="2"><b>About
IBM Semiconductor Research and Development Center :</b></font></font></p>
<p style="margin-bottom: 0cm;" align="JUSTIFY"><br>
</p>
<p style="margin-bottom: 0cm;" align="JUSTIFY"><font face="Arial, sans-serif"><font size="2">IBM's
Semiconductor Research and Development Center is responsible for the
definition and development of industry leading technologies such as
Copper Interconnect, Silicon on Insulator (SOI), High-Performance
Logic-Based Embedded DRAM technologies, and SiGe for RF and analog
applications, and high-k material technologies. SRDC is also the
leading organization in defining the most advanced technologies for
the 45 nm and 22 nm nodes, including research in various aspects of
Lithography, strained silicon, and Magnetic RAM (MRAM). IBM SRDC
develops all of IBM’s semiconductor technologies including SOI,
Bulk CMOS, RFCMOS, HV CMOS, SiGe HBT BiCMOS, and nanodevice
technologies. For more information about leadership semiconductor
technologies at IBM, please visit <a href="http://www.ibm.com/chips">www.ibm.com/chips</a>.</font></font></p><p style="margin-bottom: 0cm;" align="JUSTIFY"><br></p>Rajan K. Pandey, Ph.D. <br> <br>Semiconductor Research & Development Center <br>
India Systems & Technology Engineering Lab <br>IBM India Pvt. Ltd. <br>MD3 1F B354 <br>Manyata Embassy Business Park <br>Nagawara, Outer Ring Road <br>Bangalore - 560045, India <br>Phone: +91-80-28061262 <br>Email: <a href="mailto:rajapand@in.ibm.com">rajapand@in.ibm.com</a><br>
Webmail: <a href="mailto:rajanpandey@gmail.com">rajanpandey@gmail.com</a><br>